请问那些IN0 IN1 IN2...都有什么用呀。
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解决时间 2021-11-23 03:18
- 提问者网友:流星是天使的眼泪
- 2021-11-22 08:41
请问那些IN0 IN1 IN2...都有什么用呀。
最佳答案
- 五星知识达人网友:独行浪子会拥风
- 2021-11-22 09:38
给你一个七段数码管的实例。在小板上实现了功能的:
module led_seg7(
clk,rst_n,
sm_cs1_n,sm_cs2_n,sm_db
);
input clk; // 50MHz
input rst_n;
output sm_cs1_n,sm_cs2_n;
output[6:0] sm_db;
reg[24:0] cnt;
always @ (posedge clk or negedge rst_n)
if(!rst_n) cnt <= 25'd0;
else cnt <= cnt+1'b1;
reg[3:0] num;
always @ (posedge clk or negedge rst_n)
if(!rst_n) num <= 4'd0;
else if(cnt == 24'hffffff) num <= num+1'b1;
parameter seg0 = 7'h3f,
seg1 = 7'h06,
seg2 = 7'h5b,
seg3 = 7'h4f,
seg4 = 7'h66,
seg5 = 7'h6d,
seg6 = 7'h7d,
seg7 = 7'h07,
seg8 = 7'h7f,
seg9 = 7'h6f,
sega = 7'h77,
segb = 7'h7c,
segc = 7'h39,
segd = 7'h5e,
sege = 7'h79,
segf = 7'h71;
reg[6:0] sm_dbr;
always @ (num)
case (num)
4'h0: sm_dbr <= seg0;
4'h1: sm_dbr <= seg1;
4'h2: sm_dbr <= seg2;
4'h3: sm_dbr <= seg3;
4'h4: sm_dbr <= seg4;
4'h5: sm_dbr <= seg5;
4'h6: sm_dbr <= seg6;
4'h7: sm_dbr <= seg7;
4'h8: sm_dbr <= seg8;
4'h9: sm_dbr <= seg9;
4'ha: sm_dbr <= sega;
4'hb: sm_dbr <= segb;
4'hc: sm_dbr <= segc;
4'hd: sm_dbr <= segd;
4'he: sm_dbr <= sege;
4'hf: sm_dbr <= segf;
default: ;
endcase
assign sm_db = sm_dbr;
assign sm_cs1_n = 1'b0; //数码管1常开
assign sm_cs2_n = 1'b0; //数码管2常开
endmodule
module led_seg7(
clk,rst_n,
sm_cs1_n,sm_cs2_n,sm_db
);
input clk; // 50MHz
input rst_n;
output sm_cs1_n,sm_cs2_n;
output[6:0] sm_db;
reg[24:0] cnt;
always @ (posedge clk or negedge rst_n)
if(!rst_n) cnt <= 25'd0;
else cnt <= cnt+1'b1;
reg[3:0] num;
always @ (posedge clk or negedge rst_n)
if(!rst_n) num <= 4'd0;
else if(cnt == 24'hffffff) num <= num+1'b1;
parameter seg0 = 7'h3f,
seg1 = 7'h06,
seg2 = 7'h5b,
seg3 = 7'h4f,
seg4 = 7'h66,
seg5 = 7'h6d,
seg6 = 7'h7d,
seg7 = 7'h07,
seg8 = 7'h7f,
seg9 = 7'h6f,
sega = 7'h77,
segb = 7'h7c,
segc = 7'h39,
segd = 7'h5e,
sege = 7'h79,
segf = 7'h71;
reg[6:0] sm_dbr;
always @ (num)
case (num)
4'h0: sm_dbr <= seg0;
4'h1: sm_dbr <= seg1;
4'h2: sm_dbr <= seg2;
4'h3: sm_dbr <= seg3;
4'h4: sm_dbr <= seg4;
4'h5: sm_dbr <= seg5;
4'h6: sm_dbr <= seg6;
4'h7: sm_dbr <= seg7;
4'h8: sm_dbr <= seg8;
4'h9: sm_dbr <= seg9;
4'ha: sm_dbr <= sega;
4'hb: sm_dbr <= segb;
4'hc: sm_dbr <= segc;
4'hd: sm_dbr <= segd;
4'he: sm_dbr <= sege;
4'hf: sm_dbr <= segf;
default: ;
endcase
assign sm_db = sm_dbr;
assign sm_cs1_n = 1'b0; //数码管1常开
assign sm_cs2_n = 1'b0; //数码管2常开
endmodule
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